コンピューターアーキテクチャー / memoryを作る

Chapter 5

テキストは下のようにメモリーマップしている。

• 0～16383番地: RAM
• 16384～24575番地: Screen
• 24576番地: Keyboard

ここではひとまず下のように割り当てておく。

• 0～7番地: RAM
• 8～15番地: Screen
• 16番地: Keyboard

library ieee;
use ieee.std_logic_1164.all;

entity memory is
    port (
        inp: in std_logic_vector(15 downto 0);
        clk: in std_logic;
        address: in std_logic_vector(14 downto 0);
        load: in std_logic;
        dip_sw: in std_logic_vector(15 downto 0);
        outp: out std_logic_vector(15 downto 0)
    );
end entity;

architecture behavior of memory is
    signal outp_ram8, outp_screen, outp_keyboard: std_logic_vector(15 downto 0);
begin
    ram: entity work.ram8
    port map (
        inp => inp,
        clk => clk,
        load => load,
        address => address(2 downto 0),
        outp => outp_ram8
    );
    
    screen: entity work.ram8
    port map (
        inp => inp,
        clk => clk,
        load => load,
        address => address(2 downto 0),
        outp => outp_screen
    );
    
    keyboard: entity work.register_16_bit
    port map (
        clk => clk,
        load => '1',
        d => dip_sw,
        q => outp_keyboard
    );
    
    mux: entity work.mux4way16
    port map (
        a => outp_ram8,
        b => outp_screen,
        c => outp_keyboard,
        d => x"0000",
        sel => address(4 downto 3),
        outp => outp
    );
end architecture;

動作未確認