基本ゲートを作る / not、and、or、xor

p.27
使ってよいのはnandゲートだけという条件を課す。作った回路は再利用可。まずnot、and、or、xorの各ゲートを作る。
　
not:

library ieee;
use ieee.std_logic_1164.all;

entity not_gate is
    port (
        inp: in std_logic;
        outp: out std_logic
    );
end entity;

architecture behavior of not_gate is
begin
    outp <= inp nand '1';
end architecture;

and:

library ieee;
use ieee.std_logic_1164.all;

entity and_gate is
    port (
        a, b: in std_logic;
        outp: out std_logic
    );
end entity;

architecture behevior of and_gate is
begin
    outp <= (a nand b) nand '1';
end architecture;

or:

library ieee;
use ieee.std_logic_1164.all;

entity or_gate is
    port (
        a, b: in std_logic;
        outp: out std_logic
    );
end entity;

architecture behavior of or_gate is
begin
    outp <= (a nand '1') nand (b nand '1');
end architecture;

xor:

library ieee;
use ieee.std_logic_1164.all;

entity xor_gate is
    port (
        a, b: in std_logic;
        outp: out std_logic
    );
end entity;

architecture behavior of xor_gate is
    signal not_a, not_b: std_logic;
    signal and_1, and_2: std_logic;
begin
    not_a <= a nand '1';
    not_b <= b nand '1';
    
    and_1 <= (a nand not_b) nand '1';
    and_2 <= (b nand not_a) nand '1';
    
    outp <= (and_1 nand '1') nand (and_2 nand '1');
end architecture;

実機で動作を確認する。